DocumentCode
730027
Title
Substrate modeling to improve reliability of high voltage technologies
Author
Stefanucci, Camillo ; Buccella, Pietro ; Moursy, Yasser ; Hao Zou ; Iskander, Ramy ; Kayal, Maher ; Sallese, Jean Michel
Author_Institution
Ecole Polytech. Fed. de Lausanne (EPFL), Lausanne, Switzerland
fYear
2015
fDate
24-26 June 2015
Firstpage
1
Lastpage
6
Abstract
In Smart Power ICs there is the need of new substrate models to be integrated in the design flow of power circuits. This work reports the latest results regarding the substrate modeling methodology based on three-dimensional lumped components extraction of diodes, resistors and contacts. The substrate network including lateral and vertical parasitic bipolar transistor can be automatically created from any chip layout including temperature and geometry variations. In such a way fast dc and transient analysis can be carried out in early design stages to improve reliability of high voltage ICs. Since the high variability and complexity on modern Smart Power technologies, a flexible model is required. This work discusses all the features related to technology variations. Circuit simulator results are then compared with TCAD simulations.
Keywords
integrated circuit modelling; integrated circuit reliability; power integrated circuits; circuit simulator; high voltage technologies; parasitic bipolar transistor; power circuits; smart power IC; substrate modeling; three-dimensional lumped components extraction; Couplings; Geometry; Integrated circuit modeling; Mathematical model; Resistors; Semiconductor device modeling; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Mixed-Signal Testing Workshop (IMSTW), 2015 20th International
Conference_Location
Paris
Type
conf
DOI
10.1109/IMS3TW.2015.7177884
Filename
7177884
Link To Document