DocumentCode
734524
Title
Reduction of synchronization latency using speculative techniques
Author
Kiruthiga, K. ; Thamilselvi, S.S.
Author_Institution
Dept. of ECE, K.S.Rangasamy Coll. of Technol., Tirucengode, India
fYear
2015
fDate
19-20 March 2015
Firstpage
1
Lastpage
7
Abstract
Modern multicore systems have a large number of components operating in different clock domains and communicating through asynchronous interfaces. These interfaces use synchronizer circuits, which guard against metastability failures but introduce latency in processing the asynchronous input. A speculative method helps to reduce synchronization latency by overlapping it with commutation cycles.
Keywords
clocks; multiprocessing systems; asynchronous input processing; asynchronous interfaces; clock domains; metastability failures; multicore systems; speculative method; speculative techniques; synchronization latency reduction; synchronizer circuits; Delays; Indexes; Radiation detectors; Sequential analysis; Silicon; Synchronization; Metastability; asynchronous interface; flipflops; latency;
fLanguage
English
Publisher
ieee
Conference_Titel
Innovations in Information, Embedded and Communication Systems (ICIIECS), 2015 International Conference on
Conference_Location
Coimbatore
Print_ISBN
978-1-4799-6817-6
Type
conf
DOI
10.1109/ICIIECS.2015.7192932
Filename
7192932
Link To Document