• DocumentCode
    741028
  • Title

    Base Transformation With Injective Residue Mapping for Dynamic Range Reduction in RNS

  • Author

    Fatt Tay, Thian ; Chip-Hong Chang ; Sousa, Leonel

  • Author_Institution
    Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, Singapore
  • Volume
    62
  • Issue
    9
  • fYear
    2015
  • Firstpage
    2248
  • Lastpage
    2259
  • Abstract
    Many RNS-based implementations of digital signal processing algorithms have experienced the overkill of arithmetic operator sizes due to the choice of moduli set to accommodate for the occasional high precision operations. As the sizes of modulo arithmetic operators are fixed by the choice of their moduli, they are not scalable even if there is a subsequent reduction in the dynamic range. This paper introduces the notion of base transformation to complement residue scaling in reducing the overall arithmetic processing costs of multi-base RNS. A new algorithm is proposed to directly map the residues of signed integers from one modulo-arithmetic friendly base S1 ≡ {2n-1, 2n+k, 2n+1} to another S2 ≡ {2n-α-1, 2n+k-α, 2n-α+1}, to reduce the word lengths of residue arithmetic operators by α bits along with the reduction of dynamic range. It infers the quantized segment in S2 directly from the quantized segment of the input residues in S1 to avoid the complex reverse conversion and sign detection operations. Our synthesis results show that its VLSI implementation efficiency, in terms of area-delay product and energy consumption, outperforms the best possible improvised solution and the approach of removing one modulus channel. Noticeably, the improvements enhance with increasing α.
  • Keywords
    VLSI; residue number systems; VLSI implementation efficiency; area-delay product; base transformation; digital signal processing algorithms; dynamic range reduction; energy consumption; injective residue mapping; modulo arithmetic operators; multibase RNS; residue arithmetic operators; residue number system; Adders; Computer architecture; Digital signal processing; Dynamic range; Hardware; Heuristic algorithms; Transforms; Digital arithmetic; modulo arithmetic; residue number system; sign detection; special moduli set;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems I: Regular Papers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-8328
  • Type

    jour

  • DOI
    10.1109/TCSI.2015.2451871
  • Filename
    7229379