Integrated gate matrix switch for optical packet buffering

Author

Burmeister, Emily F. ; Bowers, John E.

Author_Institution

Electr. & Comput. Eng. Dept., Univ. of California, Santa Barbara, CA, USA

Volume

18

Issue

1

fYear

2006

Firstpage

103

Lastpage

105

Abstract

An integrated 2 × 2 semiconductor optical amplifier gate matrix switch is characterized for use in an optical packet buffer. Error-free performance for all port configurations is demonstrated for 40 Gb/s with less than 1-dB power penalty and an input power dynamic range of greater than 15 dB. Switching times are measured for decreasing optical input power to show an upper limit of 1-ns rise time (20%-80%). The factors limiting the maximum number of recirculations are explored toward optimizing future designs. It is concluded that the amplifier gate matrix switch is suitable for optical packet buffering.

Keywords

integrated optics; optical communication equipment; optical fibre communication; optical switches; semiconductor optical amplifiers; 1 ns; 2×2 switch; 40 Gbit/s; all port configurations; error-free performance; gate matrix switch; integrated switch; optical packet buffering; power penalty; recirculations; semiconductor optical amplifier; Dynamic range; Integrated optics; Optical buffering; Optical packet switching; Optical switches; Power measurement; Power semiconductor switches; Semiconductor optical amplifiers; Stimulated emission; Time measurement; Optical buffers; optical memories; optical switches; photonic integrated circuits; semiconductor optical amplifiers (SOAs);

fLanguage

English

Journal_Title

Photonics Technology Letters, IEEE

Publisher

ieee

ISSN

1041-1135

Type

jour

DOI

10.1109/LPT.2005.860386

Filename

1546051