• DocumentCode
    74567
  • Title

    Split gate resurf stepped oxide UMOSFET with P-pillar for improved performance

  • Author

    Wang Ying ; Hu Haifan ; Wang Liguo ; Yu Chenghao

  • Author_Institution
    Coll. of Inf. & Commun. Eng., Harbin Eng. Univ., Harbin, China
  • Volume
    7
  • Issue
    4
  • fYear
    2014
  • fDate
    Apr-14
  • Firstpage
    965
  • Lastpage
    972
  • Abstract
    In this work, the authors propose a split-gate resurf stepped oxide with P-pillar (SGRSOP) UMOS structure. The P-pillar trench under the source electrode in SGRSOP U-shape metal-oxide-semiconductor (UMOS) serves the purpose of simultaneously achieving the following: (1) it has formed a local super junction (SJ) structure with the N-type drift. The P-pillar modulates the electric field distribution in the local SJ and increases the N- drift region doping concentration. (2) It has suppressed the parasitic bipolar junction transistor (BJT) effect by adding the P-pillar in the N- drift region, enlarges the boundary of the snapback. As compared with the SGRSO UMOS, the SGRSOP UMOS only add the P-pillar structure, while it has the better performance. The simulation results show that the SGRSOP UMOS reduces the on-state specific resistance (RSP) and increases the transconductance (gm), improves the figure of merit and its UIS ruggedness is as good as that of the split-gate resurf stepped oxide UMOS.
  • Keywords
    bipolar transistors; power MOSFET; semiconductor doping; N- drift region doping concentration; P-pillar; RSP; SGRSOP; UMOS structure; electric field distribution; local super junction structure; on-state specific resistance; parasitic BJT effect suppression; performance improvement; power MOSFET; source electrode; split gate resurf stepped oxide UMOSFET; split-gate resurf stepped oxide UMOS; transconductance;
  • fLanguage
    English
  • Journal_Title
    Power Electronics, IET
  • Publisher
    iet
  • ISSN
    1755-4535
  • Type

    jour

  • DOI
    10.1049/iet-pel.2013.0363
  • Filename
    6786926