DocumentCode
746993
Title
Sparse Matrix Computations on Reconfigurable Hardware
Author
Prasanna, Viktor K. ; Morris, Gerald R.
Author_Institution
Univ. of Southern California, CA
Volume
40
Issue
3
fYear
2007
fDate
3/1/2007 12:00:00 AM
Firstpage
58
Lastpage
64
Abstract
Using a high-level-language to hardware-description-language compiler and some novel architectures and algorithms to map two well-known double-precision floating-point sparse matrix iterative-linear-equation solvers - the Jacobi and conjugate gradient methods - onto a reconfigurable computer achieves more than a twofold speedup over software
Keywords
conjugate gradient methods; hardware description languages; high level languages; program compilers; reconfigurable architectures; sparse matrices; Jacobi method; conjugate gradient method; double-precision floating-point sparse matrix iterative-linear-equation solver; hardware-description-language compiler; high-level-language; reconfigurable computer hardware; Algorithm design and analysis; Binary trees; Character generation; Clocks; Degradation; Field programmable gate arrays; Hardware design languages; Pipelines; Runtime; Sparse matrices; Conjugate gradient method; FPGAs; Jacobi method; reconfigurable computing;
fLanguage
English
Journal_Title
Computer
Publisher
ieee
ISSN
0018-9162
Type
jour
DOI
10.1109/MC.2007.103
Filename
4133997
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