0.18-μm nondestructive readout FeRAM using charge compensation technique

Author

Kato, Yoshihisa ; Yamada, Takayoshi ; Shimada, Yasuhiro

Author_Institution

Semicond. Res. Center, Matsushita Electr. Ind. Co. Ltd., Osaka, Japan

Volume

52

Issue

12

fYear

2005

Firstpage

2616

Lastpage

2621

Abstract

A nondestructive readout (NDRO) FeRAM using a 0.18-μm CMOS technology has been developed. Readout voltages across the ferroelectric lower than the coercive voltage allowed the FeRAM to achieve high read endurance exceeding required performance for system LSIs, 10¹⁶ read cycles. The NDRO approach uses a newly developed charge compensation technique to correct the process variations in threshold voltage of neighboring readout transistors, leading to a wide NDRO operation margin over a supply voltage range from 1.1 to 1.8 V.

Keywords

CMOS integrated circuits; charge compensation; ferroelectric storage; nondestructive readout; 0.18 micron; 1.1 to 1.8 V; CMOS technology; NDRO FeRAM; NDRO operation; charge compensation technique; coercive voltage; ferroelectric memory; nondestructive readout FeRAM; process variation; readout transistors; readout voltage; system LSI; threshold voltage; CMOS process; CMOS technology; EPROM; Fabrication; Ferroelectric films; Ferroelectric materials; Nonvolatile memory; Polarization; Random access memory; Threshold voltage; Ferroelectric memories; nondestructive readout;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2005.859688

Filename

1546323