Traffic routing algorithm for serial superchip system customisation

Author

Chen, W. ; Mavor, J. ; Denyer, P.B. ; Renshaw, D.

Author_Institution

Dept. of Electr. & Comput. Eng., New Jersey Inst. of Technol., Newark, NJ, USA

Volume

137

Issue

1

fYear

1990

fDate

1/1/1990 12:00:00 AM

Firstpage

65

Lastpage

73

Abstract

A traffic routing algorithm is presented for system customisation of the serial superchip architecture. In modern signal processing and scientific computation, system reconfigurability is highly desired to achieve dynamic reconfiguration during system operation and static reconfiguration. For example, for defect/fault tolerance before system operation. The superchip architecture is aimed at achieving both dynamic and static reconfigurability. The algorithm introduced here is intended to help system designers customise a superchip (which may be partially good) at the systems level. The algorithm will optimally search for traffic routes according to the connectivity information extracted from system specification, while avoiding defective elements on the chip.

Keywords

computer architecture; microprocessor chips; connectivity information; defective elements; scientific computation; serial superchip system customisation; signal processing; static reconfiguration; system customisation; system operation; system reconfigurability; system specification; traffic routing algorithm;

fLanguage

English

Journal_Title

Computers and Digital Techniques, IEE Proceedings E

Publisher

iet

ISSN

0143-7062

Type

jour

Filename

41353