Title :
Self-convergent scheme for logic-process-based multilevel/analog memory
Author :
Lee, Kung-Hong ; Wang, Shih-Chen ; King, Ya-Chin
Author_Institution :
Nat. Tsing-Hua Univ., Hsinchu, Taiwan
Abstract :
A multilevel/analog electrically erasable programmable read only memory cell fabricated by standard CMOS logic process is presented. The cell is operated by select-gate-controlled channel current induced drain avalanche hot hole for programming and hot electron for erasing. The self-convergent programming scheme proposed allows this cell to be easily adopted for the multilevel or analog storage. In addition, a compact SPICE subcircuit model of the cell has been established to facilitate cell behavior simulation with its interfacing circuits, especially for multilevel/analog nonvolatile memory applications.
Keywords :
CMOS analogue integrated circuits; EPROM; SPICE; analogue storage; circuit simulation; hot carriers; integrated circuit modelling; multivalued logic; CMOS logic process; EEPROM; SPICE subcircuit model; analog erasable programmable read only memory cell; cell behavior simulation; drain avalanche hot hole; electrically erasable programmable read only memory; hot electrons; multilevel erasable programmable read only memory cell; nonvolatile memory applications; select-gate-controlled channel current; self-convergent programming; Analog memory; CMOS logic circuits; CMOS process; Charge carrier processes; Circuit simulation; EPROM; Hot carriers; Logic programming; SPICE; Semiconductor device modeling; Analog memory; electrically erasable programmable read only memory (EEPROM); logic process; multilevel; nonvolatile memory (NVM);
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2005.859648
