Understanding quasi-ballistic transport in nano-MOSFETs: part II-Technology scaling along the ITRS

Author

Eminente, Simone ; Esseni, David ; Palestri, Pierpaolo ; Fiegna, Claudio ; Selmi, Luca ; Sangiorgi, Enrico

Author_Institution

ARCES Center, Bologna, Italy

Volume

52

Issue

12

fYear

2005

Firstpage

2736

Lastpage

2743

Abstract

The on-current and its ballistic limit for MOSFETs designed according to the 2003 International Technology Roadmap for Semiconductors down to the 45-nm node, are evaluated by using the full-band, self-consistent Monte Carlo simulator with quantum-mechanical corrections described in Part I. Our results show that quasi-ballistic transport increases for L_G below approximately 50 nm and contributes most part of the I_ON improvements related to scaling. Thanks to a lower vertical electric field, double-gate silicon-on-insulator MOSFETs with ultrathin body and low channel doping achieve performance closer to the ballistic limit than the bulk counterparts.

Keywords

MOSFET; Monte Carlo methods; ballistic transport; nanotechnology; semiconductor device models; silicon-on-insulator; 45 nm; ITRS; Monte Carlo method; ballistic limit; channel doping; nano MOSFET; quantum mechanical corrections; quasi ballistic transport; semiconductor device modeling; silicon on insulator; technology scaling; vertical electric field; Analytical models; Ballistic transport; Helium; MOSFETs; Monte Carlo methods; Particle scattering; Semiconductor device doping; Semiconductor device modeling; Silicon on insulator technology; Transistors; Back-scattering; MOSFETs; Monte Carlo method (MC); ballistic transport; semiconductor device modeling; silicon-on-insulator (SOI);

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2005.859566

Filename

1546339