• DocumentCode
    747694
  • Title

    Ultra-Fine Pitch Stencil Printing for a Low Cost and Low Temperature Flip-Chip Assembly Process

  • Author

    Kay, Robert W. ; Stoyanov, Stephen ; Glinski, Greg P. ; Bailey, Chris ; Desmulliez, Marc P Y

  • Author_Institution
    MicroStencil, Ltd, Edinburgh
  • Volume
    30
  • Issue
    1
  • fYear
    2007
  • fDate
    3/1/2007 12:00:00 AM
  • Firstpage
    129
  • Lastpage
    136
  • Abstract
    This paper presents the results of a packaging process based on the stencil printing of isotropic conductive adhesives (ICAs) that form the interconnections of flip-chip bonded electronic packages. Ultra-fine pitch (sub-100-mum), low temperature (100degC), and low cost flip-chip assembly is demonstrated. The article details recent advances in electroformed stencil manufacturing that use microengineering techniques to enable stencil fabrication at apertures sizes down to 20mum and pitches as small as 30mum. The current state of the art for stencil printing of ICAs and solder paste is limited between 150-mum and 200-mum pitch. The ICAs-based interconnects considered in this article have been stencil printed successfully down to 50-mum pitch with consistent printing demonstrated at 90-mum pitch size. The structural integrity or the stencil after framing and printing is also investigated through experimentation and computational modeling. The assembly of a flip-chip package based on copper column bumped die and ICA deposits stencil printed at sub-100-mum pitch is described. Computational fluid dynamics modeling of the print performance provides an indicator on the optimum print parameters. Finally, an organic light emitting diode display chip is packaged using this assembly process
  • Keywords
    assembling; computational fluid dynamics; conductive adhesives; copper; fine-pitch technology; flip-chip devices; integrated circuit bonding; integrated circuit interconnections; solders; 100 C; 90 micron; Cu; computational fluid dynamics model; copper column bumped die; electroformed stencil manufacturing; flip-chip assembly process; flip-chip bonded electronic packages; isotropic conductive adhesives; microengineering techniques; organic light emitting diode display chip; solder paste; stencil fabrication; structural integrity; ultra-fine pitch stencil printing; Assembly; Bonding; Computational modeling; Conductive adhesives; Costs; Electronics packaging; Independent component analysis; Manufacturing; Printing; Temperature; Computational fluid dynamics (CFD); isotropic conductive adhesives (ICAs); organic light emitting diode (OLED);
  • fLanguage
    English
  • Journal_Title
    Components and Packaging Technologies, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1521-3331
  • Type

    jour

  • DOI
    10.1109/TCAPT.2007.892085
  • Filename
    4135397