Latent design faults in the development of the Multiflow TRACE/200

Author

Colwell, Robert P. ; Lethin, Richard A.

Author_Institution

Intel Corp., Hillsboro, OR, USA

Volume

43

Issue

4

fYear

1994

fDate

12/1/1994 12:00:00 AM

Firstpage

557

Lastpage

565

Abstract

Several examples of design faults that appeared during the development of the Multiflow TRACE/200 series of minisupercomputers are discussed. The design flaws generally fell into a few categories: interface mis-assumptions, instruction cache, parity-related, designer errors, CAD tools, and defective part designs (especially ground-bounce). Examples of bugs in each category are given. Random diagnostics were particularly helpful in detecting several fault classes. The authors conclude with a classification of the severity and time history of the bug categories

Keywords

computer debugging; fault tolerant computing; minicomputers; parallel machines; reliability; CAD tools; Multiflow TRACE/200; bugs; classification; defective part designs; design flaws; designer errors; development; fault classes; ground bounce; instruction cache; interface mis-assumptions; latent design faults; minisupercomputers; parity; random diagnostics; severity history; time history; Artificial intelligence; Computer bugs; Concurrent computing; Design methodology; Fault detection; Job shop scheduling; Laboratories; Parallel processing; Testing; VLIW;

fLanguage

English

Journal_Title

Reliability, IEEE Transactions on

Publisher

ieee

ISSN

0018-9529

Type

jour

DOI

10.1109/24.370226

Filename

370226