DocumentCode
751636
Title
Embedded timing analysis: a soc infrastructure
Author
Tabatabaei, Sassan ; Ivanov, André
Author_Institution
Vector 12 Corporation
Volume
19
Issue
3
fYear
2002
Firstpage
22
Lastpage
34
Keywords
Circuit testing; Delay effects; Delay estimation; Frequency measurement; Jitter; Sampling methods; Signal resolution; Time domain analysis; Time measurement; Timing;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/MDT.2002.1003786
Filename
1003786
Link To Document