• DocumentCode
    754534
  • Title

    A traveling-wave-based waveform approximation technique for the timing verification of single transmission lines

  • Author

    Eo, Yungseon ; Shim, Jongin ; Eisenstadt, William R.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Hanyang Univ., Ansan, South Korea
  • Volume
    21
  • Issue
    6
  • fYear
    2002
  • fDate
    6/1/2002 12:00:00 AM
  • Firstpage
    723
  • Lastpage
    730
  • Abstract
    Today´s high-speed very large scale integration interconnects are becoming inductively dominated (moderate Q) resistance-inductance-capacitance (RLC) transmission lines. The time-domain system responses of RLC interconnect lines driving load capacitances cannot be accurately represented by using a finite number of poles with exception for a particular case of RC-time-constant-dominant (low Q) RLC systems. In this paper, a new traveling-wave-based waveform approximation technique is presented. The method suggests that a steady-state traveling wave is approximately determined by a three-pole approximation technique. Then the time-domain response of the system can be accurately determined by using the traveling waves that are modeled by multiple reflections. The signal delay models of the RLC interconnect lines are derived as a closed form. The technique is verified by varying the source resistance, load impedance, and transmission line circuit model parameters of several RLC lines. The results show excellent agreement with HSPICE simulation results. That is, approximately 5% error in a 50% delay calculation can be achieved
  • Keywords
    VLSI; high-speed integrated circuits; integrated circuit interconnections; integrated circuit layout; integrated logic circuits; pole assignment; time-domain analysis; timing; transmission line theory; waveform analysis; HSPICE simulation; VLSI logic gates; circuit model parameters; closed form; high-speed VLSI interconnect; input step function; resistance-inductance-capacitance transmission lines; signal delay models; single transmission lines; steady-state traveling wave; three-pole approximation; time-domain system responses; timing verification; traveling-wave-based waveform approximation; wiring rules; Capacitance; Delay; Distributed parameter circuits; Impedance; Integrated circuit interconnections; Reflection; Steady-state; Time domain analysis; Transmission lines; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2002.1004316
  • Filename
    1004316