DocumentCode
756193
Title
A 0.5-V 1-Msps Track-and-Hold Circuit With 60-dB SNDR
Author
Chatterjee, Shouri ; Kinget, Peter R.
Author_Institution
Columbia Univ., New York, NY
Volume
42
Issue
4
fYear
2007
fDate
4/1/2007 12:00:00 AM
Firstpage
722
Lastpage
729
Abstract
We discuss a design technique that makes possible the operation of track-and-hold (T/H) circuits with very low supply voltages, down to 0.5 V. A 0.5-V 1-Msps T/H circuit with a 60-dB SNDR is presented. The fully differential circuit is fabricated in the CMOS part of a 0.25-mum BiCMOS process, with standard 0.6-V VT devices, and uses true low-voltage design techniques with no clock boosting and no voltage boosting. The T/H circuit has a measured current consumption of 600 muA
Keywords
BiCMOS analogue integrated circuits; low-power electronics; sample and hold circuits; 0.25 micron; 0.5 V; 600 muA; BiCMOS process; SNDR; analog integrated circuits; fully differential circuit; low-voltage design; signal-to-noise-and-distortion ratio; track-and-hold circuit; Analog circuits; BiCMOS integrated circuits; Boosting; CMOS process; CMOS technology; Low voltage; Nanoscale devices; Switches; Switching circuits; Threshold voltage; Analog integrated circuits; body-bias; low-voltage; sample-and-hold; track-and-hold;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.2007.892211
Filename
4140575
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