• DocumentCode
    756883
  • Title

    Ideal rectangular cross-section Si-Fin channel double-gate MOSFETs fabricated using orientation-dependent wet etching

  • Author

    Yongxun Liu ; Ishii, K. ; Tsutsumi, T. ; Masahara, M. ; Suzuki, E.

  • Author_Institution
    Nat. Inst. of Adv. Ind. Sci. & Technol., Japan
  • Volume
    24
  • Issue
    7
  • fYear
    2003
  • fDate
    7/1/2003 12:00:00 AM
  • Firstpage
    484
  • Lastpage
    486
  • Abstract
    Ultranarrow and ideal rectangular cross section silicon(Si)-Fin channel double-gate MOSFETs (FXMOSFETs) have successfully been fabricated for the first time using [110]-oriented silicon-on-insulator (SOI) wafers and orientation-dependent wet etching. The transconductance (g/sub m/) normalized by 2×(Fin height) is found to be as high as 700 μS/μm at V/sub d/=1 V in the fabricated 13-nm-thick and 82-nm-high Si- Fin channel double-gate MOSFET with a 105-nm gate length and a 2.2-nm gate oxide. The almost-ideal S-slope of 64 mV/decade is demonstrated in a 145-nm gate length device. These excellent results show that the Si-Fin channel with smooth [111]-oriented sidewalls is suitable to realize a high-performance FXMOSFET. The short-channel effects (SCEs) are effectively suppressed by reducing the Si-Fin thickness to 23 nm or less.
  • Keywords
    MOSFET; etching; silicon-on-insulator; 105 nm; 13 nm; 145 nm; 2.2 nm; 82 nm; FXMOSFETs; SOI; Si; Si-Fin channel double-gate MOSFETs; almost-ideal S-slope; gate length; ideal rectangular cross-section; orientation-dependent wet etching; smooth [111]-oriented sidewalls; transconductance; Fabrication; FinFETs; MOSFETs; Oxidation; Shape; Silicon on insulator technology; Threshold voltage; Transconductance; Wet etching;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2003.815004
  • Filename
    1217305