Design Methodology for a 40-GSamples/s Track and Hold Amplifier in 0.18- $\\mu\\hbox {m}$ SiGe BiCMOS Technology

Author

Shahramian, Shahriar ; Carusone, Anthony Chan ; Voinigescu, Sorin P.

Author_Institution

Dept. of Electr. & Comput. Eng., Toronto Univ., Ont.

Volume

41

Issue

10

fYear

2006

Firstpage

2233

Lastpage

2240

Abstract

A 40-GSamples/s track and hold amplifier (THA) is designed and fabricated in 0.18-mum SiGe BiCMOS and operates from a 3.6-V supply. The total power consumption is 540 mW with a chip area of 1.1 mm². Time domain measurements demonstrate 40-GHz sampling and S-parameter measurements show a 3-dB bandwidth of 43 GHz in track mode. For 19-GHz input signals, a total harmonic distortion of -27 dB at the 1dB compression point has been measured and a spurious-free dynamic range of 35 dB has been achieved

Keywords

BiCMOS integrated circuits; Ge-Si alloys; analogue-digital conversion; integrated circuit design; low noise amplifiers; sample and hold circuits; 0.18 micron; 3.6 V; 540 mW; BiCMOS technology; DSP-based equalizer; S-parameter measurements; SiGe; analog-to-digital converter; time domain measurements; track and hold amplifier; BiCMOS integrated circuits; Design methodology; Distortion measurement; Energy consumption; Germanium silicon alloys; Sampling methods; Scattering parameters; Semiconductor device measurement; Silicon germanium; Time measurement; Analog-to-digital converter; DSP-based equalizer; SiGe BiCMOS; equalization; track and hold amplifier;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2006.878111

Filename

1703677

Design Methodology for a 40-GSamples/s Track and Hold Amplifier in 0.18- SiGe BiCMOS Technology

Shahramian, Shahriar ; Carusone, Anthony Chan ; Voinigescu, Sorin P.

jour

Design Methodology for a 40-GSamples/s Track and Hold Amplifier in 0.18- $\\mu\\hbox {m}$ SiGe BiCMOS Technology