• DocumentCode
    760225
  • Title

    New algorithm for testing random access memories

  • Author

    Rajsuman, R.

  • Author_Institution
    Dept. of Comput. Eng. & Sci., Case Western Reserve Univ., Cleveland, OH, USA
  • Volume
    27
  • Issue
    7
  • fYear
    1991
  • fDate
    3/28/1991 12:00:00 AM
  • Firstpage
    574
  • Lastpage
    575
  • Abstract
    A linear time complexity algorithm to test RAMs is presented. The algorithm requires only 7 n read/write operations and provides an extensive fault coverage. The main advantage of the proposed scheme is that a small test time can be achieved.
  • Keywords
    integrated circuit testing; integrated memory circuits; random-access storage; 7 n read/write operations; RAM chips testing; fault coverage; linear time complexity algorithm; small test time; testing random access memories;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19910362
  • Filename
    100844
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=760225