DocumentCode
760715
Title
A neuromime in VLSI
Author
Wolpert, Seth ; Micheli-Tzanakou, Evangelia
Author_Institution
Sch. of Sci., Eng. & Technol., Pennsylvania State Univ., Middletown, PA, USA
Volume
7
Issue
2
fYear
1996
fDate
3/1/1996 12:00:00 AM
Firstpage
300
Lastpage
306
Abstract
Using conventional very large scale integration (VLSI) technology, a flexible and comprehensive neuromime circuit has been implemented in silicon for the purpose of modeling nerve networks from living organisms. Based on the “integrate-and-fire” model of neuronal threshold, the circuit was fabricated in two-micron CMOS with double-level metal. It occupies 0.6 square millimeters of die area, and requires only a few passive biasing components off-chip. The neuromime circuit offers many continuously variable parameters, including excitatory and inhibitory sensitivity and persistence, refractory duration and strength, and overall speed of operation. The circuit offers free and continuous access to waveforms for presynaptic membrane potential, postsynaptic membrane potential, and threshold potential. As such, it is amenable to many secondary behavioral characteristics, such as postinhibitory rebound, fatigue, facilitation, and accommodation. Being power-efficient, compact, and noise immune, it is ideal for assembly into networks and interfacing to biological counterparts
Keywords
CMOS analogue integrated circuits; VLSI; neural chips; 2 micron; CMOS; VLSI; excitatory sensitivity; inhibitory sensitivity; neural chips; neuromime; passive biasing; postsynaptic membrane potential; presynaptic membrane potential; threshold potential; Biomembranes; CMOS technology; Circuit noise; Fatigue; Flexible printed circuits; Immune system; Organisms; Semiconductor device modeling; Silicon; Very large scale integration;
fLanguage
English
Journal_Title
Neural Networks, IEEE Transactions on
Publisher
ieee
ISSN
1045-9227
Type
jour
DOI
10.1109/72.485633
Filename
485633
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