A processor architecture for 3D graphics

Author

Wang, Yulun ; Mangaser, Amante ; Srinivasan, Partha

Author_Institution

Computer Motion, Goleta, CA, USA

Volume

12

Issue

5

fYear

1992

Firstpage

96

Lastpage

105

Abstract

The DLX/3DCP architecture that uses a method of parallel processing on 3-D vectors to overcome the problem of the large number of floating-point operations required in 3-D graphics which limits the performance of graphics systems is described. The architecture´s design offers general-purpose programmability from the high-level object-oriented language C++ and generates performance expected only from dedicated special-purpose hardware. Results that show the architecture´s performance on graphics operations are presented and compared to the performance of other RISC processors.<>

Keywords

computer architecture; computer graphics; digital arithmetic; performance evaluation; reduced instruction set computing; 3-D vectors; 3D graphics; DLX/3DCP architecture; RISC processors; dedicated special-purpose hardware; floating-point operations; general-purpose programmability; high-level object-oriented language C++; parallel processing; performance; processor architecture; Application software; Assembly; Computer architecture; Computer graphics; Feeds; Hardware; Parallel processing; Pipeline processing; Reduced instruction set computing; Vector processors;

fLanguage

English

Journal_Title

Computer Graphics and Applications, IEEE

Publisher

ieee

ISSN

0272-1716

Type

jour

DOI

10.1109/38.156019

Filename

156019