• DocumentCode
    76296
  • Title

    Analytical Probability Density Calculation for Step Pulse Response of a Single-Ended Buffer With Arbitrary Power-Supply Voltage Fluctuations

  • Author

    Jingook Kim ; Junho Lee ; Sunki Cho ; Chulsoon Hwang ; Changwook Yoon ; Jun Fan

  • Author_Institution
    Sch. of ECE, Ulsan Nat. Inst. of Sci. & Technol. (UNIST), Ulsan, South Korea
  • Volume
    61
  • Issue
    7
  • fYear
    2014
  • fDate
    Jul-14
  • Firstpage
    2022
  • Lastpage
    2033
  • Abstract
    An analytical methodology to calculate the probability density functions (PDFs) for the step pulse response of a single-ended buffer with arbitrary power-supply voltage fluctuations is proposed. To validate the theory, a silicon IC with noise-aggressing buffers and a victim buffer was designed, fabricated, and assembled in a printed circuit board (PCB). The overall power distribution network (PDN) of the IC and PCB was modeled from impedance measurements. The PDFs of the step pulse response of the victim buffer with power-supply voltage fluctuations were calculated and validated by comparisons with HSPICE and experimental results. The obtained PDFs due to power-supply voltage fluctuations could be combined with the statistical link simulation methods for quick estimation of bit error rate (BER).
  • Keywords
    electric impedance measurement; monolithic integrated circuits; printed circuit manufacture; probability; step response; BER; HSPICE; PCB; PDF; PDN; arbitrary power-supply voltage fluctuations; bit error rate; impedance measurements; noise-aggressing buffers; power distribution network; printed circuit board; probability density functions; silicon IC; single-ended buffer; statistical link simulation methods; step pulse response; victim buffer; Bit error rate; Integrated circuits; Inverters; Jitter; MOS devices; Switches; Threshold voltage; Bit error rate (BER); power distribution network (PDN); power supply induced jitter (PSIJ); power-supply voltage fluctuations; probability density function (PDF); signal integrity; single-ended buffer; statistical link simulation;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems I: Regular Papers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-8328
  • Type

    jour

  • DOI
    10.1109/TCSI.2013.2295933
  • Filename
    6722984