• DocumentCode
    765635
  • Title

    Generating compact code from dataflow specifications of multirate signal processing algorithms

  • Author

    Bhattacharyya, Shuvra S. ; Buck, Joseph T. ; Ha, Soonhoi ; Lee, Edward A.

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
  • Volume
    42
  • Issue
    3
  • fYear
    1995
  • fDate
    3/1/1995 12:00:00 AM
  • Firstpage
    138
  • Lastpage
    150
  • Abstract
    Synchronous dataflow (SDF) semantics are well-suited to representing and compiling multirate signal processing algorithms. A key to this match is the ability to cleanly express iteration without overspecifying the execution order of computations, thereby allowing efficient schedules to be constructed. Due to limited program memory, it is often desirable to translate the iteration in an SDF graph into groups of repetitive firing patterns so that loops can be constructed in the target code. This paper establishes fundamental topological relationships between iteration and looping in SDF graphs, and presents a scheduling framework that provably synthesizes the most compact looping structures for a large class of practical SDF graphs. By modularizing different components of the scheduling framework, and establishing their independence, we show how other scheduling objectives, such as minimizing data buffering requirements or increasing the number of data transfers that occur in registers, can be incorporated in a manner that does not conflict with the goal of code compactness
  • Keywords
    concurrency control; data flow computing; data flow graphs; iterative methods; parallel algorithms; scheduling; signal processing; SDF graph; code compactness; data buffering requirements; dataflow specifications; directed graphs; iteration; looping; multirate signal processing algorithms; repetitive firing patterns; scheduling framework; synchronous dataflow semantics; topological relationships; Computational modeling; Computer buffers; Computer graphics; Laboratories; National electric code; Processor scheduling; Registers; Signal generators; Signal processing algorithms; Signal synthesis;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1057-7122
  • Type

    jour

  • DOI
    10.1109/81.376876
  • Filename
    376876