Measurement of package inductance and capacitance matrices

Author

Young, Brian ; Sparkman, Aubrey K.

Author_Institution

Motorola Inc., Austin, TX, USA

Volume

19

Issue

1

fYear

1996

fDate

2/1/1996 12:00:00 AM

Firstpage

225

Lastpage

229

Abstract

A technique is presented for the measurement of resistance, inductance, conductance, and capacitance matrices of large pin count electronic packages. Circuit analysis of an assumed lumped model is used to define a measurement technique based on two sets of measurements on specially prepared samples. Formulas are derived for use with network analyzer measurements. Measurements and simulations on a 208-lead quad flat pack show that the method attains good accuracy for all but the small values of the conductance matrix

Keywords

capacitance measurement; electric admittance measurement; electric resistance measurement; inductance measurement; integrated circuit packaging; network analysers; capacitance matrices; conductance matrices; inductance matrices; large pin count electronic packages; lumped model; measurement technique; network analyzer measurements; quad flat pack; resistance matrices; Capacitance measurement; Circuit simulation; Electrical resistance measurement; Electronics packaging; Frequency domain analysis; Frequency measurement; Inductance measurement; Time domain analysis; Transmission line matrix methods; Transmission line measurements;

fLanguage

English

Journal_Title

Components, Packaging, and Manufacturing Technology, Part B: Advanced Packaging, IEEE Transactions on

Publisher

ieee

ISSN

1070-9894

Type

jour

DOI

10.1109/96.486506

Filename

486506