Transient modelling of single-electron transistors for efficient circuit simulation by SPICE

In the paper, a regime, where the independent treatment of single-electron transistors (SETs) in transient simulations is valid, has been identified quantitatively. It is found that, as in the steady-state case, although the temperature varies, each SET can be treated independently, even in the transient case when the interconnection capacitance is large enough. However, the value of the load capacitance C/sub L/ of the interconnections for the independent treatment of SETs is approximately ten times larger than that of the steady-state case. A compact SET transient model is developed for transient circuit simulation by SPICE. The developed model is based on a linearised equivalent circuit and the solution of a master equation is done by the programming capabilities of the SmartSpice. Exact delineation of several simulation time scales and the physics-based compact model make it possible to accurately simulate hybrid circuits in the timescales down to several tens of picoseconds.