Implementing QML for radiation hardness assurance

The US government has proposed a qualified manufacturers list (QML) methodology to qualify integrated circuits for high reliability and radiation hardness. An approach to implementing QML for single-event upset (SEU) immunity on 16k SRAMs that involves relating values of feedback resistance to system error rates is demonstrated. It is seen that the process capability indices, C_p and C _pk, for the manufacture of 400-kΩ feedback resistors required to provide SEU tolerance do not conform to 6σ quality standards. For total-dose, interface trap charge, ΔV _it, shifts measured on transistors are correlated with circuit response in the space environment. Statistical process control (SPC) is illustrated for ΔV_it, and violations of SPC rules are interpreted in terms of continuous improvement. Design validation for SEU and quality conformance inspections for total-dose are identified as major obstacles to cost-effective QML implementation. Techniques and tools that will help QML provide real cost savings are identified as physical models, 3-D device-plus-circuit codes, and improved design simulators