A Contention-Free Parallel Access by Butterfly Networks for Turbo Interleavers

A theoretical foundation for any turbo interleaver to be a contention-free interleaver to access data in parallel by a butterfly network is presented. A contention-free parallel access of multiple memories in parallel plays a crucial role for implementing high speed turbo decoders for high data rate applications. The presented theoretical analysis shows that a butterfly network has a sufficiently rich permutation structure to be a routing network between parallel decoder units and multiple memories. Thus turbo code design is independent of the designing of a contention-free parallel access by butterfly networks. In particular, a turbo interleaver needs not to provide a built-in contention-free parallel access for any parallel access by butterfly networks. We demonstrate how to apply this theory to turbo interleavers widely used in commercial telecommunication standards.