DocumentCode
770123
Title
Intelligent PLL Using Digital Processing for Network Synchronization
Author
Fukinuki, Hiroshi ; Furukawa, Isao
Author_Institution
NTT Corp., Japan
Volume
31
Issue
12
fYear
1983
fDate
12/1/1983 12:00:00 AM
Firstpage
1295
Lastpage
1303
Abstract
By combining the advanced technologies of a crystal oscillator, LSI, and a computer, an intelligent phase-locked loop (PLL) which uses digital processing (DP) can be created. This kind of PLL, which is referred to here as DP-PLL, includes a microprocessor and a digitally controlled crystal oscillator. It features excellent performance and countermeasures for disturbances of the input signal by stored program control. In this paper, implementation and performance of the DP-PLL are presented with the aim of application in a master-slave network synchronization system.
Keywords
Digital communications; PLLs; Phase-locked loop (PLL); Synchronization; Clocks; Communication system control; Control systems; Frequency; Intelligent networks; Master-slave; Microprocessors; Oscillators; Phase locked loops; Synchronization;
fLanguage
English
Journal_Title
Communications, IEEE Transactions on
Publisher
ieee
ISSN
0090-6778
Type
jour
DOI
10.1109/TCOM.1983.1095779
Filename
1095779
Link To Document