DocumentCode :
771358
Title :
A neural net based architecture for the segmentation of mixed gray-level and binary pictures
Author :
Tabatabai, Ali ; Troudet, Terry P.
Author_Institution :
Bell Commun. Res., Red Bank, NJ, USA
Volume :
38
Issue :
1
fYear :
1991
fDate :
1/1/1991 12:00:00 AM
Firstpage :
66
Lastpage :
77
Abstract :
A neural-net-based architecture is proposed to perform segmentation in real time for mixed gray-level and binary pictures. In this approach, the composite picture is divided into 16×16 pixel blocks, which are identified as character blocks or image blocks on the basis of a dichotomy measure computed by an adaptive 16×16 neural net. For compression purposes, each image block is further divided into 4×4 subblocks and, similar to the classical block truncation coding (BTC) scheme, a one-bit nonparametric quantizer is used to encode 16×16 character and 4×4 image blocks. In this case, however, the binary map and quantizer levels are obtained through a neural net segmentor over each block. The efficiency of the neural segmentation in terms of computational speed, data compression, and quality of the compressed picture is demonstrated. The effect of weight quantization is also discussed. VLSI implementations of such adaptive neural nets in CMOS technology are described and simulated in real time for a maximum block size of 256 pixels
Keywords :
CMOS integrated circuits; VLSI; computerised picture processing; data compression; encoding; neural nets; parallel architectures; real-time systems; CMOS technology; VLSI implementations; adaptive neural net; adaptive neural nets; composite picture; compressed picture; computational speed; data compression; image processing; mixed Gray level/binary pictures; neural net based architecture; nonparametric quantizer; real time; segmentation; weight quantization; CMOS technology; Computational modeling; Computer architecture; Data compression; Image coding; Image segmentation; Neural networks; Pixel; Quantization; Very large scale integration;
fLanguage :
English
Journal_Title :
Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0098-4094
Type :
jour
DOI :
10.1109/31.101304
Filename :
101304
Link To Document :
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