MOS varactor modeling with a subcircuit utilizing the BSIM3v3 model

Author

Molnár, Kund ; Rappitsch, Gerhard ; Huszka, Zoltán ; Seebacher, Ehrenfried

Author_Institution

Austriamicrosystems AG, Unterpremstaetten, Austria

Volume

49

Issue

7

fYear

2002

fDate

7/1/2002 12:00:00 AM

Firstpage

1206

Lastpage

1211

Abstract

This paper presents a subcircuit model for an MOS varactor based on the BSIM3v3 model suitable for simulator implementation within circuit-design environments. The development of the model and BSIM3v3 model parameter settings are discussed in detail. By varying the length (L) of the device, C_MAX/C_MIN ratios as high as five or minimum quality factors of 21.5 at 2.4 GHz can be achieved using a standard 0.35 μm CMOS process. The investigation of different geometries resulted in a tradeoff between capacitance tuning and quality factor. A medium length varactor has been characterized

Keywords

CMOS integrated circuits; MOS capacitors; Q-factor; SPICE; circuit simulation; circuit tuning; semiconductor device models; varactors; 0.35 micron; 2.4 GHz; BSIM3v3 model; C_MAX/C_MIN ratios; CMOS; MOS varactor; capacitance tuning; circuit-design environments; minimum quality factors; model parameter settings; simulator implementation; subcircuit; varactor modeling; Capacitance; Circuit simulation; Equivalent circuits; MOS capacitors; Q factor; Radio frequency; Semiconductor device modeling; Tuning; Varactors; Voltage-controlled oscillators;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2002.1013277

Filename

1013277