A 5.2-Gb/s Low-Swing Voltage-Mode Transmitter With an AC-/DC-Coupled Equalizer and a Voltage Offset Generator

Author

Seok Kim ; Youngkyun Jeong ; Mira Lee ; Kee-Won Kwon ; Jung-Hoon Chun

Author_Institution

Coll. of Inf. & Commun. Eng., Sungkyunkwan Univ., Suwon, South Korea

Volume

61

Issue

1

fYear

2014

fDate

Jan. 2014

Firstpage

213

Lastpage

225

Abstract

This paper describes a voltage-mode transmitter with an AC-/DC-coupled equalizer. A dual-loop regulator controls the tap-weight coefficient for the DC-coupled equalizer while maintaining the output matching condition. An AC-coupling technique is employed to enhance the edge rate and reduce the burden of the DC-coupled equalizer. The transmitter also supports the ability to add a DC differential voltage offset into the output signal so that the voltage margin of the link can be measured. The transmitter was fabricated using a 0.13-um CMOS technology. When 240- mV_PP, 5.2-Gb/s data are sent over 20-inch FR4 channels, the eye of the received data has a voltage margin of 60 mV and a peak-to-peak jitter of 40 ps. The proposed transmitter consumes 5.86 mW from a 1.2-V supply while operating at 5.2 Gb/s.

Keywords

CMOS integrated circuits; equalisers; impedance matching; transmitters; voltage regulators; AC-DC-coupled equalizer; CMOS technology; DC differential voltage offset; FR4 channels; bit rate 5.2 Gbit/s; dual-loop regulator; edge rate; impedance matching; low-swing voltage-mode transmitter; output matching condition; power 5.86 mW; serial interfaces; serial link; size 0.13 mum; size 20 inch; tap-weight coefficient; voltage 1.2 V; voltage 240 mV; voltage 60 mV; voltage margin; voltage offset generator; AC-coupled equalization; impedance matching; tap-weight control; voltage offset generation; voltage-mode transmitter;

fLanguage

English

Journal_Title

Circuits and Systems I: Regular Papers, IEEE Transactions on

Publisher

ieee

ISSN

1549-8328

Type

jour

DOI

10.1109/TCSI.2013.2262186

Filename

6519975