Conflict free memory addressing for dedicated FFT hardware

A multibank memory address assignment for an arbitrary fixed radix fast Fourier transform (FFT) algorithm suitable for high-speed single-chip implementation is developed. The memory assignment is `in place´ to minimize memory size and is memory-bank conflict-free to allow simultaneous access to all the data needed for calculation of each of the radix r butterflies as they occur in the algorithm. Address generation for table lookup of twiddle factors is also included. The data and twiddle factor address generation hardware is shown to have small size and high speed