1.1 V full-swing double bootstrapped BiCMOS logic gates

A new generation of noncomplementary BiCMOS digital gates for low-voltage, low-power applications is presented. These include an inverter and a NAND gate. A bootstrapping technique is employed in the pull-up and pull-down cycles to give high speed and a rail-to-rail operation. The performance evaluation has shown that the new circuits outperform the CMOS and the recently reported circuits in terms of speed, output voltage swing, power-delay product and maximum operating frequency. The crossover capacitance of the new circuit has been shown to be 50 per cent lower than the B²CMOS. A transient model for the basic circuit configuration is developed to relate the key device parameters to the pull-up response, and HSPICE simulations have been used to characterise the circuits. The experimental results have also verified the operation of the proposed circuit