Title :
High speed, high linearity CMOS buffer amplifier
Author :
Sæther, Trond ; Hung, Chung-Chih ; Qi, Zheng ; Ismail, Mohammed ; Aaserud, Oddvar
Author_Institution :
Nordic VLSI AS, Tiller, Norway
fDate :
2/1/1996 12:00:00 AM
Abstract :
A low-noise class AB buffer amplifier which has a rail-to-rail output swing while driving large resistive and capacitive loads is presented in this paper along with the test results. The amplifier is fabricated in a 3 μm double-polysilicon double-metal CMOS technology and has on-chip frequency compensating capacitors. The basic performance factors obtained in this design are: A0=70 dB, GBW=5.5 MHz, SR=7 V/μs, and υn=10nV/√Hz@100 kHz. With a supply voltage of ±5 V, the amplifier has a ±4.7 V output swing and features a low 30 Ω open-loop output impedance. The total harmonic distortion is at a low -77 dB for a 7Vout,pp output level with the fundamental frequency of 20 kHz. From the test results, it is demonstrated that an overall high performance is achieved with this design
Keywords :
CMOS analogue integrated circuits; buffer circuits; compensation; differential amplifiers; harmonic distortion; integrated circuit noise; operational amplifiers; -4.7 to 4.7 V; -5 V; 3 micron; 5 V; CMOS buffer amplifier; Si; THD; double-metal CMOS technology; double-polysilicon CMOS; high linearity amplifier; high speed amplifier; low-noise class AB amplifier; onchip frequency compensating capacitors; rail-to-rail output swing; total harmonic distortion; CMOS technology; Capacitors; Frequency; Impedance; Linearity; Low-noise amplifiers; Rail to rail amplifiers; Rail to rail outputs; Testing; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
