A low-power 98-dB multibit audio DAC in a standard 3.3-V 0.35-μm CMOS technology

Author

Annovazzi, Marzia ; Colonna, Vittorio ; Gandolfi, Gabriele ; Stefani, Fabrizio ; Baschirotto, Andrea

Author_Institution

STMicroelectronics, Cornaredo, Italy

Volume

37

Issue

7

fYear

2002

fDate

7/1/2002 12:00:00 AM

Firstpage

825

Lastpage

834

Abstract

An oversampled digital-to-analog converter (DAC) is presented. The performance of this device has been achieved with a careful tradeoff with power consumption. A digital ΣΔ modulator has been optimized for the 96-dB target. In the switched-capacitor reconstruction filter (SCF), the input structure is embedded in the feedback loop in order to reduce the output noise. The order of the SCF is three, larger than in competitive solutions, allowing to achieve a lower out-of-band noise. Finally, the differential-to-single-ended converter does not strongly limit the overall DAC channel performance. The device has been realized in a standard 3.3-V CMOS technology. With a 28-mW-per-channel power consumption the dynamic range is 98 dB, while the SNDR peak is 86 dB

Keywords

CMOS integrated circuits; audio signal processing; digital-analogue conversion; low-power electronics; signal reconstruction; switched capacitor filters; 0.35 micron; 28 mW; 3.3 V; CMOS technology; SNDR; differential-to-single-ended converter; dynamic range; feedback loop; low-power multibit audio DAC; out-of-band noise; oversampled digital-to-analog converter; power consumption; switched capacitor reconstruction filter; CMOS technology; Circuits; Digital modulation; Digital-analog conversion; Dynamic range; Energy consumption; Filters; Noise level; Noise reduction; Signal to noise ratio;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2002.1015679

Filename

1015679