DocumentCode
776175
Title
Glitch reduction in second-generation SI circuits
Author
Oliaei, O. ; Loumeau, P.
Author_Institution
Electron. Dept., Ecole Nat. Superieure des Telecommun., Paris, France
Volume
31
Issue
8
fYear
1995
fDate
4/13/1995 12:00:00 AM
Firstpage
597
Lastpage
598
Abstract
A simple method for reducing the glitches of second-generation SI circuits is presented. For a given SI circuit it is sufficient to apply this technique only to the last stage
Keywords
active networks; switched current circuits; active networks; circuit stages; glitch reduction; second-generation SI circuits; switched current circuits;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19950437
Filename
383976
Link To Document