Segmented Group-Inversion Coding for Parallel Links

Author

Sim, Jae-Yoon

Author_Institution

Pohang Univ. of Sci. & Technol., Kyungbuk

Volume

54

Issue

4

fYear

2007

fDate

4/1/2007 12:00:00 AM

Firstpage

328

Lastpage

332

Abstract

A new segmented group-inversion coding is proposed to achieve current balancing in single-ended parallel data transmission. With minimal increase in number of pins, the proposed coding reduces the difference between the number of ZEROs and ONEs to only 0 or 2. Since the proposed coding is a simple inversion-or-not transformation of pre-defined groups of binary data, it can be implemented with greatly simplified logic circuits. Generalization for the optimum grouping is also presented. A transmitter with 16-bit link was designed for verification. The proposed coding scheme is suitable for gigabit parallel links to reduce the simultaneous switching noise

Keywords

CMOS logic circuits; data communication; encoding; transceivers; binary data; current balancing; data coding; gigabit parallel links; inversion coding; inversion-or-not transformation; logic circuits; parallel data transmission; segmented group-inversion coding; Circuit noise; Communication switching; Data communication; Digital systems; Logic circuits; Noise reduction; Pins; Steady-state; Transceivers; Transmitters; Current balancing; data coding; inversion coding; parallel link; simultaneous switching noise;

fLanguage

English

Journal_Title

Circuits and Systems II: Express Briefs, IEEE Transactions on

Publisher

ieee

ISSN

1549-7747

Type

jour

DOI

10.1109/TCSII.2007.895072

Filename

4155070