• DocumentCode
    77746
  • Title

    A Stochastic Approach for the Analysis of Fault Trees With Priority AND Gates

  • Author

    Peican Zhu ; Jie Han ; Leibo Liu ; Zuo, Ming J.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Alberta, Edmonton, AB, Canada
  • Volume
    63
  • Issue
    2
  • fYear
    2014
  • fDate
    Jun-14
  • Firstpage
    480
  • Lastpage
    494
  • Abstract
    Dynamic fault tree (DFT) analysis has been used to account for dynamic behaviors such as the sequence-dependent, functional-dependent, and priority relationships among the failures of basic events. Various methodologies have been developed to analyze a DFT; however, most methods require a complex analytical procedure or a significant simulation time for an accurate analysis. In this paper, a stochastic computational approach is proposed for an efficient analysis of the top event´s failure probability in a DFT with priority AND (PAND) gates. A stochastic model is initially proposed for a two-input PAND gate, and a successive cascading model is then presented for a general multiple-input PAND gate. A stochastic approach using the proposed models provides an efficient analysis of a DFT compared to an accurate analysis or algebraic approach. The accuracy of a stochastic analysis increases with the length of random binary bit streams in stochastic computation. The use of non-Bernoulli sequences of random permutations of fixed counts of 1s and 0s as initial input events´ probabilities makes the stochastic approach more efficient, and more accurate than Monte Carlo simulation. Non-exponential failure distributions and repeated events are readily handled by the stochastic approach. The accuracy, efficiency, and scalability of the stochastic approach are shown by several case studies of DFT analysis.
  • Keywords
    circuit reliability; fault trees; logic gates; stochastic processes; dynamic fault tree analysis; general multiple input PAND gate; nonBernoulli sequence; nonexponential failure distributions; priority AND gates; random permutation; stochastic computation; Analytical models; Computational modeling; Discrete Fourier transforms; Fault trees; Logic gates; Probability density function; Stochastic processes; Dynamic fault tree; non-Bernoulli sequence; priority AND gate; reliability analysis; stochastic computation; stochastic logic;
  • fLanguage
    English
  • Journal_Title
    Reliability, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9529
  • Type

    jour

  • DOI
    10.1109/TR.2014.2313796
  • Filename
    6797971