DocumentCode
777547
Title
An unconditionally stable two-stage CMOS amplifier
Author
Reay, Richard J. ; Kovacs, Gregory T A
Author_Institution
Center for Integrated Syst., Stanford Univ., CA, USA
Volume
30
Issue
5
fYear
1995
fDate
5/1/1995 12:00:00 AM
Firstpage
591
Lastpage
594
Abstract
This paper describes a two-stage CMOS amplifier that is stable for any capacitive load. This is achieved through the use of an optimized cascoded compensation topology. A new level shifting technique allows independent optimization of drive capability, noise and systematic offset voltage. The circuit is 0.1 mm2 in a 2 μm technology and has a quiescent current consumption of 110 μA
Keywords
CMOS analogue integrated circuits; circuit optimisation; circuit stability; compensation; differential amplifiers; equivalent circuits; 110 muA; 2 micron; capacitive load; independent optimization; level shifting technique; optimized cascoded compensation topology; two-stage CMOS amplifier; unconditionally stable amplifier; CMOS technology; Circuit noise; Circuit stability; Circuit topology; Equations; Frequency; Instruments; Noise level; Power amplifiers; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.384174
Filename
384174
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