Title :
Exploiting binary functionality in quaternary look-up tables for increased functional density in multiple-valued logic FPGAs
Author :
Kelly, P.M. ; McGinnity, T.M. ; Maguire, L.P. ; McDaid, L.
Author_Institution :
Intelligent Syst. Eng. Lab., Univ. of Ulster, Derry, UK
fDate :
3/17/2005 12:00:00 AM
Abstract :
A full adder is used to demonstrate a programming technique using binary functionality for increased functional density in quaternary look-up table-based field programmable gated arrays (FPGAs). The potential inefficiencies of using quaternary level functionality for these architectures are also illustrated.
Keywords :
adders; field programmable gate arrays; logic design; logic programming; table lookup; binary functionality; field programmable gated arrays; full adder; functional density; multiple-valued logic FPGA; quaternary look-up tables;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20057762
