Title :
Analysis and Modeling of Threshold Voltage Mismatch for CMOS at 65 nm and Beyond
Author :
Johnson, Jeffrey B. ; Hook, Terence B. ; Lee, Yoo-Mi
Author_Institution :
Semicond. R&D Center, IBM Microelectron., Essex Junction, VT
fDate :
7/1/2008 12:00:00 AM
Abstract :
This letter investigates random dopant fluctuation transistor mismatch. The dominance of the halo implant is demonstrated experimentally and with simulation, and a compact model form is developed for improved representation of the phenomenon.
Keywords :
CMOS integrated circuits; ion implantation; transistors; CMOS integrated circuit; halo implant; random dopant fluctuation; size 65 nm; threshold voltage mismatch; transistor mismatch; CMOS technology; Circuit simulation; Fluctuations; MOSFET circuits; Microelectronics; Research and development; Resource description framework; Semiconductor device modeling; Semiconductor process modeling; Threshold voltage; CMOSFETs; doping; transistors;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2008.2000649
