DocumentCode
78249
Title
All-Digital Simple Clock Synthesis Through a Glitch-Free Variable-Length Ring Oscillator
Author
Perez-Puigdemont, Jordi ; Moll, Francesc ; Calomarde, Antonio
Author_Institution
Dept. of Electron. Eng., Univ. Politec. de Catalunya, Barcelona, Spain
Volume
61
Issue
2
fYear
2014
fDate
Feb. 2014
Firstpage
90
Lastpage
94
Abstract
This brief presents a simple all-digital variable-length ring oscillator (VLRO) design that is capable of synchronously changing the output frequency while keeping a signal free of glitches or spurious oscillations at the frequency transitions. The correct operation of the proposed VLRO has been experimentally validated on a 90-nm Xilinx Spartan-3E field-programmable gate array, showing the ability to switch between 16 different frequencies (from 24.1 to 321 MHz for the nominal core supply voltage) under different supply voltages with the expected behavior.
Keywords
clocks; field programmable gate arrays; oscillators; VLRO; Xilinx Spartan 3E field programmable gate array; all digital simple clock synthesis; all digital variable length ring oscillator; frequency transition; glitch free signal; glitch free variable length ring oscillator; size 90 nm; Clocks; Delay lines; Delays; Field programmable gate arrays; Logic gates; Oscillators; Voltage measurement; Clocks; digital circuits; digital integrated circuits; field programmable gate arrays; ring oscillators; semiconductor device reliability;
fLanguage
English
Journal_Title
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher
ieee
ISSN
1549-7747
Type
jour
DOI
10.1109/TCSII.2014.2299096
Filename
6725696
Link To Document