Title :
An imager with built-in image-velocity computation capability
Author :
Chong, Chu Phoon ; Salama, C. Andre T ; Smith, Kenneth C.
Author_Institution :
Dept. of Electr. Eng., Toronto Univ., Ont., Canada
fDate :
9/1/1992 12:00:00 AM
Abstract :
An imager with built-in image-velocity computation capability is described. The image-velocity computation technique is based on signals propagating on delay lines. Silicon implementation using 3-μm-CMOS technology is described. Experimental results show that a computational error of less than 20% can be achieved using available fabrication technology. This figure can be reduced by using larger arrays and better implementations of delay gates
Keywords :
CMOS integrated circuits; delay lines; image sensors; 3.0 micron; CMOS technology; Si; computational error; delay gates; delay lines; image velocity computation; imager; Delay lines; Error correction; Fabrication; Image analysis; Image edge detection; Image segmentation; Propagation delay; Signal design; Silicon;
Journal_Title :
Circuits and Systems for Video Technology, IEEE Transactions on
