A 130-nm 0.9-V 66-MHz 8-Mb (256K × 32) local SONOS embedded flash EEPROM

Author

Seo, Myoung-Kyu ; Sim, Soung-Hoon ; Oh, Myoung-Hee ; Lee, Hyo-Sang ; Kim, Sang-Won ; Cho, In-Wook ; Kim, Gyu-Hong ; Kim, Moon-Gone

Author_Institution

Syst. LSI Div., Samsung Electron. Co. Ltd., Gyunggi-Do, South Korea

Volume

40

Issue

4

fYear

2005

fDate

4/1/2005 12:00:00 AM

Firstpage

877

Lastpage

883

Abstract

In a 0.13-μm CMOS logic compatible process, a 256K × 32 bit (8 Mb) local SONOS embedded flash EEPROM was implemented using the ATD-assisted current sense amplifier (AACSA) for 0.9 V (0.7 ∼ 1.4 V) low V_CC application. Read operation is performed at a high frequency of 66 MHz and shows a low current of typically 5 mA at 66-MHz operating frequency. Program operation is performed for common source array with wide I/Os (×32) by using the data-dependent source bias control scheme (DDSBCS). This novel local SONOS embedded flash EEPROM core has the cell size of 0.276 μm² (16.3 F²/bit) and the program and erase time of 20 μs and 20 ms, respectively.

Keywords

CMOS memory circuits; amplifiers; embedded systems; flash memories; low-power electronics; 0.9 V; 130 nm; 20 ms; 20 mus; 5 mA; 66 MHz; 8 Mbit; ATD-assisted current sense amplifier; CMOS logic compatible process; SONOS embedded flash EEPROM; common source array; data-dependent source bias control scheme; embedded flash memory; erase time; high frequency; low operating current; low voltage application; program operation; program time; read operation; CMOS logic circuits; CMOS process; EPROM; Energy consumption; Flash memory; Frequency; Logic devices; SONOS devices; System-on-a-chip; Voltage; EEPROM; embedded flash memory; flash memory; high frequency; low operating current; program disturbance;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2005.845564

Filename

1424218