A 72-mW CMOS 802.11a direct conversion front-end with 3.5-dB NF and 200-kHz 1/f noise corner

Author

Valla, Mario ; Montagna, Giampiero ; Castello, Rinaldo ; Tonietto, Riccardo ; Bietti, Ivan

Author_Institution

STMicroelectronics, Pavia, Italy

Volume

40

Issue

4

fYear

2005

fDate

4/1/2005 12:00:00 AM

Firstpage

970

Lastpage

977

Abstract

A direct conversion 802.11a receiver front-end including a synthesizer with quadrature VCO has been integrated in a 0.13-μm CMOS process. The chip has an active area of 1.8 mm² with the entire RF portion operated from 1.2 V and the low frequency portion operated from 2.5 V. Its key features are a current driven passive mixer with a low impedance load that achieves a low 1/f noise corner and an high I-Q accuracy quadrature VCO. Measured noise figure is 3.5 dB with an 1/f noise corner of 200 kHz, and an IIP3 of -2 dBm. The synthesizer DSB phase noise integrated over a 10 MHz band is less than -36 dBc while its I-Q phase unbalance is below 1 degree.

Keywords

1/f noise; CMOS integrated circuits; IEEE standards; integrated circuit noise; phase noise; radio receivers; radiofrequency integrated circuits; voltage-controlled oscillators; 1.2 V; 1/f noise; 10 MHz; 2.5 V; 3.5 dB; 72 mW; CMOS receiver; I-Q accuracy quadrature VCO; I-Q phase unbalance; current driven passive mixer; direct conversion 802.11a receiver front-end; low impedance load; low power dissipation; noise figure measurement; synthesizer DSB phase noise; wireless system; Active noise reduction; CMOS process; Impedance; Low-frequency noise; Noise figure; Noise measurement; Phase noise; Radio frequency; Synthesizers; Voltage-controlled oscillators; 802.11a; CMOS receiver; WLAN; low power dissipation; quadrature; synthesizer; wireless system;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2004.842847

Filename

1424229