• DocumentCode
    788050
  • Title

    Concurrent error detection in array multipliers for GF(2m) fields

  • Author

    Chiou, Che Wun

  • Author_Institution
    Dept. of Electron. Eng., Ching Yun Inst. of Technol., Chung-li, Taiwan
  • Volume
    38
  • Issue
    14
  • fYear
    2002
  • fDate
    7/4/2002 12:00:00 AM
  • Firstpage
    688
  • Lastpage
    689
  • Abstract
    Based on Lee-Lu-Lee´s array multipliers and the RESO method, a concurrent error detection scheme in array multipliers for GF(2m ) fields is presented and only one clock cycle is added. The fault tolerant capability in such array multipliers is also included and only two extra clock cycles are required
  • Keywords
    computational complexity; error detection; fault tolerance; multiplying circuits; GF(2m) fields; Lee-Lu-Lee´s multipliers; RESO method; array multipliers; clock cycle; concurrent error detection; fault tolerant capability; recomputing with shifted operands;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20020468
  • Filename
    1019811
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=788050