Testing of data paths in VLSI arrays

An important issue in VLSI array design is how to test switches and data links in an array. The authors present a ´divide-and-conquer´ technique for testing data paths in VLSI arrays. The data paths including registers, switches and data links are tested in parallel by applying test patterns from the outside. The fault-free paths identified divide the array into smaller subarrays with fault-free boundaries so that testing can be done recursively. Fault masking due to switch failures is examined. A sufficient condition to avoid fault masking is obtained.