Reduction of off-current in self-aligned double-gate TFT with mask-free symmetric LDD

Author

Zhang, Shengdong ; Han, Ruqi ; Sin, Johnny K O ; Chan, Mansun

Author_Institution

Inst. of Microelectron., Peking Unv., Beijing, China

Volume

49

Issue

8

fYear

2002

fDate

8/1/2002 12:00:00 AM

Firstpage

1490

Lastpage

1492

Abstract

In this work, the lateral electric field distribution in the channel of a double-gate TFT is studied and compared with that of a conventional single-gate TFT. The double-gate TFT is predicted to suffer from a more severe anomalous off-current than the single-gate TFT. A smart double-gate TFT technology is proposed to decrease the off-current. The unique feature of the technology is the lithography independent formation of the self-aligned double-gate and the symmetric lightly doped drain (LDD) structures. With the LDD applied, the anomalous off-current of the fabricated double-gate TFT is reduced by three orders of magnitude from the range of 10^-9 A/μm to 10^-12 A/μm. The on/off current ratio is increased by three orders of magnitude accordingly from around 10⁴ to 10⁷.

Keywords

electric current; electric fields; insulated gate field effect transistors; semiconductor technology; thin film transistors; anomalous off-current; channel lateral electric field; device fabrication; double-gate TFT; electric field simulation; lateral electric field distribution; lithography independent formation; mask-free symmetric LDD; off-current reduction; self-aligned double-gate formation; smart double-gate TFT technology; symmetric lightly doped drain structures; thin-film. transistor; Councils; Doping; Fabrication; Flat panel displays; Grain boundaries; Lithography; Medical simulation; Microelectronics; Silicon compounds; Thin film transistors;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2002.801232

Filename

1019939