DocumentCode
790437
Title
Design and implementation of a Java processor
Author
Tan, Y.Y. ; Yau, C.H. ; Lo, K.M. ; Yu, W.S. ; Mok, P.L. ; Fong, A.S.
Author_Institution
Dept. of Electron. Eng., City Univ. of Hong Kong, China
Volume
153
Issue
1
fYear
2006
Firstpage
20
Lastpage
30
Abstract
Java is widely applied in current embedded systems due to its object-oriented features and advantages such as security, robustness, and platform independence. A Java virtual machine is needed to execute Java programs. However, in most of the existing solutions to Java virtual machines, the overhead of executing object-oriented related instructions is significant and becomes the bottleneck of system performance. To solve this problem, a novel Java processor called jHISC is proposed, which mainly targets J2ME and embedded applications. In jHISC, the object-oriented related instructions are implemented by hardware directly, as a hardware-readable data structure is used to represent the object. The complete system with 4 kB instruction cache and 8 kB data cache is described by VHDL and implemented in a Xilinx Virtex FPGA. It occupies 601 859 equivalent gates and the maximum clock frequency of the system is about 30 MHz. Compared with PicoJava II, the overall performance is speeded up 1 to 7.4 times and the execution efficiency of object-oriented related bytecodes is improved by 0.91 to 13.2 times for the same clock frequency.
Keywords
Java; data structures; embedded systems; field programmable gate arrays; hardware description languages; logic design; microprocessor chips; object-oriented programming; virtual machines; J2ME; Java processor; Java virtual machine; VHDL; Xilinx Virtex FPGA; embedded systems; hardware-readable data structure; jHISC;
fLanguage
English
Journal_Title
Computers and Digital Techniques, IEE Proceedings -
Publisher
iet
ISSN
1350-2387
Type
jour
DOI
10.1049/ip-cdt:20050074
Filename
1576338
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