• DocumentCode
    791599
  • Title

    A New Multistage Noise-Shaping Architecture

  • Author

    Gupta, Ajay K. ; Vasudev, Nambakam ; Collins, Oliver M.

  • Author_Institution
    Notre Dame Univ., IN
  • Volume
    53
  • Issue
    10
  • fYear
    2006
  • Firstpage
    2132
  • Lastpage
    2144
  • Abstract
    This paper presents a new architecture for high dynamic range, low oversampling ratio (OSR) noise-shaped digital-to-analog converters (DACs). The instantaneous noise feedforward architecture is a multistage structure in which the instantaneous noise and gain/phase distortion in the first stage are cancelled by passing them through another converter and then subtracting them at the output after analog attenuation. The signal-to-noise-and-distortion ratio (SNDR) of a device using this architecture scales as the product of the first noise shaper´s SNDR and the ratiometric precision of the attenuator technology. This new architecture was implemented by driving the bits of an existing DAC (with binary weighting) using specially generated digital signals. One set of experimental measurements demonstrates a spurious-free dynamic range (SFDR) performance of 83 dBc in a 125-MHz bandwidth centered at 325 MHz while using an OSR of only 4. A second set of experimental measurements produces an SFDR performance of 70 dBc in a 125-MHz bandwidth centered slightly above 1.3 GHz with an OSR of 16
  • Keywords
    circuit noise; digital-analogue conversion; feedforward; 125 MHz; attenuator technology; binary weighting; digital-to-analog converters; feedforward architecture; intersymbol interference; multistage architecture; noise-shaping architecture; sigma-delta modulation; spurious-free dynamic range; Attenuation; Bandwidth; Digital-analog conversion; Dynamic range; Multi-stage noise shaping; Noise cancellation; Noise shaping; Phase distortion; Phase noise; Signal to noise ratio; Digital–analog conversion; feedforward systems; intersymbol interference (ISI); sigma–delta modulation;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems I: Regular Papers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-8328
  • Type

    jour

  • DOI
    10.1109/TCSI.2006.882819
  • Filename
    1710193