Lot Size Management in the Semiconductor Industry: Queueing Analysis for Cycle Time Optimization

In semiconductor manufacturing, production units (wafers) are transferred and processed in lots. While the current convention is a lot size of 25 wafers in semiconductor manufacturing, there has been much discussion about changing this standard to a smaller value. The principal motivation behind moving to smaller lot sizes is to decrease the average cycle time of a wafer. In this paper, we develop a simple queueing model to gain an insight into the relationship among cycle time, lot size, and the fab technology level. This analysis shows that, depending on the system parameters, moving to smaller lot sizes does not always yield cycle time improvements.